1. Field of Invention
The present invention relates to an electro-optical device composed of a semiconductor layer on a substrate, a manufacturing method for manufacturing the electro-optical device, and electronic equipment. In particular, the present invention relates to an electro-optical device having a channel region of the semiconductor layer connected to a light-shielding layer, a manufacturing method for manufacturing the electro-optical device, and electronic equipment.
2. Description of Related Art
The SOI (Silicon On Insulator) technology, which forms a semiconductor of a monocrystal silicon layer on an insulator substrate and then produces a semiconductor element such as a transistor on the semiconductor layer, is advantageous in the implementation of high-speed and power-saving design, and of the high degree of integration into elements. For example, the SOI technology finds applications in a switching element in a TFT array in an electro-optical device such as a liquid-crystal display device.
In typical bulk semiconductor parts, the channel region of a transistor is kept to a predetermined potential through a substrate thereof, and the element is thus free from the electrical characteristic degradation attributed to parasitic bipolar effect resulting from a change in the potential of the channel.
Since a transistor forming a switching element of a TFT array is completely isolated by an oxide insulator in an electro-optical device such as a liquid-crystal display device, the channel region of the transistor cannot be kept to a predetermined potential unlike a bulk semiconductor transistor. For this reason, the channel region remains electrically floating. In particular, when the transistor has a structure of a monocrystal silicon layer, the mobility of carriers traveling within the channel region is high. Carriers accelerated by the electric field in the vicinity of the drain region of the transistor impact the crystal lattice, leading to a phenomenon called impact ionization. As a result, holes, generated in an N-channel TFT, are accumulated in the bottom portion of the channel. When charges are accumulated in the channel in this way, the NPN structure of the TFT (in case of the N-channel TFT) apparently functions as a bipolar device. An abnormal current lowers the element source-drain withstand voltage, leading to electrical characteristic degradation. A group of phenomena attributed to the electrically floating channel is called a substrate floating effect.
It is an object of the present invention to provide an electro-optical device which stabilizes and improves electrical characteristics of a transistor having a monocrystal silicon layer covered with an insulator layer, by preventing the transistor source-drain withstand voltage from being lowered by the substrate floating effect.
An electro-optical device of one exemplary embodiment of the present invention includes, on a support substrate, a plurality of scanning lines, a plurality of data lines which intersects the plurality of scanning lines, a transistor connected to each of the scanning lines and each of the data lines, a pixel electrode connected to each transistor, an insulator layer, formed beneath a semiconductor layer of the transistor serving as a channel of the transistor, and an electrically conductive light-shielding layer formed between the insulator layer and the support substrate, wherein an extension portion of the semiconductor layer is electrically connected to the light-shielding layer.
Since the channel region of the transistor is connected to the electrically conductive light-shielding layer formed beneath the insulator layer under the semiconductor layer of the transistor in the present invention, the channel region is kept to the potential of the light-shielding layer. No abnormal current flows through the transistor, and the electrical characteristics of the transistor are thus stabilized.
In accordance with another exemplary embodiment of the present invention, the extension portion is preferably connected to the light-shielding layer through an interconnect line that runs through a first contact hole formed in the extension portion and a second contact hole formed in the light-shielding layer. With this arrangement, an existing wiring layer is used as the interconnect line for connecting the extension portion to the light-shielding layer.
This arrangement eliminates the need for arranging a new wiring layer, thereby reducing manufacturing steps.
In accordance with another exemplary embodiment of the present invention, the extension portion is preferably connected to the light-shielding layer through an interconnect line that runs through a first contact hole formed in the extension portion and a second contact hole that penetrates the extension portion in a region including the internal portion of the first contact hole and is formed in the light-shielding layer. This arrangement allows the interconnect line to occupy the smallest possible area, thereby controlling a reduction in the aperture ratio of a light-transmissive region which is important in a transmissive-type liquid-crystal display device.
In accordance with another exemplary embodiment of the present invention, the interconnect line is preferably fabricated of the same layer as the one that forms the data line or the scanning line. Since this arrangement allows the interconnect line to be manufactured together with the data line or the scanning line, the electro-optical device can be produced using a related manufacturing process.
In accordance with another exemplary embodiment of the present invention, the electro-optical device preferably includes a storage capacitor connected to the pixel electrode and formed of the semiconductor layer, a capacitive line fabricated of the same layer as the one that forms the scanning line and running in parallel with the scanning line, and an insulator layer interposed between the semiconductor layer and the capacitive line, wherein either the scanning line or the capacitive line includes a bypass path bypassing the interconnect line. When the storage capacitor is incorporated, this arrangement allows the channel region of the transistor to be connected to the electrically conductive light-shielding layer while efficiently making use of a limited space.
In accordance with another exemplary embodiment of the present invention, the light-shielding layers of the transistors are preferably electrically connected to each other in the direction of the scanning line or in the direction of the data line, or in both the directions of the scanning line and the data line, and are preferably supplied with a predetermined potential. This arrangement controls the potential of the light-shielding layer, thereby preventing variations in the threshold voltage of the transistor formed over the light-shielding layer. The electrical characteristics of the transistor are thus stabilized.
In the above arrangement, preferably, the predetermined potential provided to the light-shielding layer is not higher than the lowest potential applied to the source or the drain of the transistor when the transistor arranged over the light-shielding layer is an N-channel transistor. Preferably, the predetermined potential provided to the light-shielding layer is not lower than the highest potential applied to the source or the drain of the transistor when the transistor arranged over the light-shielding layer is a P-channel transistor. Since electrons or holes generated in the channel with the transistor being driven flow to the light-shielding layer through the extension portion, the potential of the channel region is stabilized. This arrangement controls the substrate floating effect of the transistor, thereby preventing a drop in the withstand voltage of the transistor.
In accordance with another exemplary embodiment of the present invention, the thickness of the semiconductor layer preferably ranges from 100 to 180 nm. The semiconductor layer thicker than 100 nm allows the transistor to operate in a partial depletion mode. With the semiconductor layer connected to the light-shielding layer, the potential of the channel region is stabilized. The semiconductor layer thinner than 180 nm controls, to the minimum possible height, a step in the element substrate due to the semiconductor layer thickness. As a result, this arrangement controls disclination when the liquid crystal is aligned, thereby keeping an image quality in a good state.
Further, an exemplary manufacturing method for manufacturing an electro-optical device of another exemplary embodiment of the present invention, includes (a) a step of fabricating a light-shielding layer on a substrate, (b) a step of fabricating an insulator layer on the light-shielding layer, (c) a step of fabricating, on the insulator layer, a semiconductor layer that forms a channel region of a transistor, an extension portion of the channel region, and one electrode of a storage capacitor, and (d) a step of interconnecting the extension portion of the channel region to the light-shielding layer.
In accordance with this exemplary manufacturing method, the extension portion connected to the channel region of the transistor is formed to be connected to the electrically conductive light-shielding layer. The channel region is fixed to the potential of the light-shielding layer. This arrangement resolves the problem of the degradation of the source-drain withstand voltage of the transistor caused by the substrate floating effect attributed to a high carrier mobility of the monocrystal silicon and an SOI structure. An electro-optical device having stable electrical characteristics is thus manufactured.
In accordance with this exemplary manufacturing method, the (c) step preferably includes gluing a monocrystal silicon substrate onto the substrate, and forming the semiconductor layer of the monocrystal silicon layer by removing an unwanted portion from the glued monocrystal silicon substrate. Since this exemplary manufacturing method manufactures a high performance transistor fabricated of monocrystal silicon as a drive element for the electro-optical device, the image quality and reliability thereof are improved.
In accordance with this exemplary manufacturing method, the (d) step preferably includes connecting an interconnect line, which connects the extension portion to the light-shielding layer through a first contact hole formed in the extension portion and a second contact hole formed in the light-shielding layer, to the semiconductor layer through a third contact hole formed in the semiconductor layer. Since the interconnect line and the data line are concurrently fabricated of the same material in this manufacturing method, the interconnect line is produced without increasing manufacturing steps.
The (d) step preferably includes connecting an interconnect line, which connects the extension portion to the light-shielding layer through a first contact hole in the extension portion and a second contact hole that penetrates the extension portion in a region including the internal portion of the first contact hole and is formed in the light-shielding layer, to the semiconductor layer through a third contact hole formed in the semiconductor layer. This arrangement in which the second contact hole wholly or in part overlaps the region of the first contact hole results in a smaller layout area than in the arrangement in which the two contact holes are separately formed. The aperture ratio of the display area is thus enlarged, thereby resulting in a bright display.
In the exemplary manufacturing method of one exemplary embodiment of the present invention, the (d) step preferably includes fabricating, of the same layer as the one that forms the scanning line, an interconnect line which interconnects the extension portion to the light-shielding layer through a first contact hole formed in the extension portion and a second contact hole formed in the light-shielding layer. Since the interconnect line and the scanning line are concurrently fabricated of the same material in this manufacturing method, the interconnect line is produced without increasing manufacturing steps.
The (d) step preferably includes fabricating, of the same layer as the one that forms the scanning line, an interconnect line which connects the extension portion to the light-shielding layer through a first contact hole in the extension portion and a second contact hole that penetrates the extension portion in a region including the internal portion of the first contact hole and is formed in the light-shielding layer. This arrangement in which the second contact hole wholly or in part overlaps the region of the first contact hole results in a smaller layout area than in the arrangement in which the two contact holes are separately formed. The aperture ratio of the display area is thus enlarged, thereby resulting in a bright display.
The electro-optical device may include a counter substrate arranged to be opposed to the surface of the support substrate where the semiconductor layer is formed, and an electro-optical material interposed between the two substrates and driven by the transistor.
Electronic equipment of an exemplary embodiment of the present invention includes a light source, an electro-optical device for modulating light incoming from the light source in response to image information, and projection means for projecting the light modulated through the electro-optical device.